Date of Award

8-1-2026

Degree Name

Master of Science

Department

Electrical and Computer Engineering

First Advisor

Anagnostopoulos, Iraklis

Abstract

Differentiable Logic Gate Networks are networks of nodes trained differentially through backpropagation. The process of creating Logic Gate Networks in a differentiable manner is done primarily in one of two ways: A consideration of all outputs of all possible two-input gates at a given node, or a learned truth table that is functionally equivalent to a logic gate at a given node. There are multiple variations of each approach to address the issues of vanishing gradients, discretization error, and parameter bloat. What current literature does not address are additional model components to be used as surrogates for digital logic functionality that is differentially learned. This thesis presents Diffmux, a source-preserving and N-choose-1 operator that provides spares output in a differentiable manner. Routing from sources to the output is performed explicitly using learned addresses trained via backpropagation. The component is made to be literature-agnostic, as it will function for all existing variations of DLGNs published as of this thesis. To date, the only model components proposed are fixed operators, such as OR-gates and AND-gates, implemented at the locations where max-pooling occurs. Given a situation where sources must be preserved, which would rule out the use of OR/AND pooling, the novel N-choose-1 operator is the only way to address such a constraint. A study is conducted to show that the best possible configuration for DLGN networks that use Diffmux is one that uses sigmoid decoders, linear address functions, and unique gate-paired wiring. The use of Diffmux to implement nonlinearity into a model like a pooling operator is also explored in the context of Convolutional Differentiable Logic Gate Networks. Lastly, this thesis explores how the use of a Diffmux as a model component can optimize DLGNs. A diffmux can maintain competitive accuracy while conducting large next-layer node count reductions when compared to the existing maximum reduction and can be used to reduce overall model parameter count in DLGN networks.

Available for download on Thursday, September 14, 2028

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