Date of Award
12-1-2025
Degree Name
Master of Science
Department
Electrical and Computer Engineering
First Advisor
Tragoudas, Spyros
Abstract
Current delay testing methodologies for integrated circuits face critical limitations, asrobust tests remain unachievable for most paths, forcing reliance on Non-Robust (NR) tests that suffer from unrealistic single-fault assumption, the path under test non being sensitized, and vulnerability to hazard-induced errors. This thesis propose a built-in sen- sor to detect delayed hazards and a sensor to diagnose circuits in the presence of those hazards resulting reliable detection. This thesis intends to propose 2 sensors for non-robust test-based monitoring and test- ing. The first sensor discussed is for IC testing with NR tests. This sensor is capable of detecting any full-swing transient that occurs right after the capture clock. The second sensor allows a test point to be sampled multiple times per test vector with high resolu- tion to extract a sequence of events it undergoes during the sensor’s sampling interval. These data will be used to diagnose IC defects and for monitoring ICs with deep learn- ing. The proposed sensors can effectively address current challenges in IC testing, diagnos- ing, and monitoring, leading to improved product quality and reliability. The introduced IC testing and monitoring approaches significantly enhance reliability, reducing the test escapes, surpassing the limitations of conventional statistical methods.
Access
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