Date of Award
8-1-2025
Degree Name
Master of Science
Department
Electrical and Computer Engineering
First Advisor
Tragoudas, Spyros
Abstract
Integrated circuits (ICs) are increasingly susceptible to delay defects due to process variations in modern nanoscale fabrication technologies. Traditional fault models relying on robust testing often fail to detect such faults, especially under non-robust (NR) test conditions where transient behavior may be masked at the clock edge. ICs degrade when operating in the field and require periodic monitoring. This thesis proposes a deep learning-based approach to monitor and classify ICs using a transformer neural network trained on output signatures sampled within a single clock period. It demonstrates the potential of deep learning for IC monitoring and improves defect detection in the presence of process variations. The approach captures the pre-settling behavior at observable test points (OTPs) induced by non-robust patterns without modifying the clock frequency. The transformer model learns temporal dependencies in the output waveforms and accurately classifies circuits as fault-free or faulty. Experimental results on ISCAS'85, ISCAS'89, and ITC'99 show that the proposed method significantly reduces false negative rates while maintaining high classification accuracy, achieving over 99% accuracy in multiple benchmark circuits.
Access
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