NANOSCALE EFFECTS IN JUNCTIONLESS FIELD EFFECT TRANSISTORS

Author

Abdussamad Muntahi, Southern Illinois University CarbondaleFollow

Date of Award

5-1-2018

Degree Name

Doctor of Philosophy

Department

Electrical and Computer Engineering

First Advisor

Ahmed, Shaikh

Abstract

Though the concept of junctionless field effect transistor (JLFET) is old, it was not possible to fabricate a useful JLFET device, as it requires a very shallow channel region. Very recently, the emergence of new and advanced technologies has made it possible to create viable JLFET devices using nanowires. This work aims to computationally investigate the interplay of quantum size-quantization and random dopant fluctuations (RDF) effects in nanoscale JLFETs. For this purpose, a 3-D fully atomistic quantum-corrected Monte Carlo device simulator has been integrated and used in this work. The size-quantiza¬tion effect has been accounted for via a param¬eter-free effec¬tive potential scheme and benchmarked against the NEGF approach in the ballistic limit. To study the RDF effects and treat full Coulomb (electron-ion and electron-electron) interactions in the real-space and beyond the Poisson picture, the simulator implements a corrected-Coulomb electron dynamics (QC-ED) approach. The essential bandstructure and scattering parameters (energy bandgap, effective masses, and the density-of-states) have been computed using an atomistic 20-band nearest-neighbour sp3d5s* tight-binding scheme. First, an experimental device was simulated to evaluate the validity of the simulator. Because of the small dimension, quantum mechanical confinement was found to be the dominant mechanism that significantly degrades the current drive capability of nanoscale JLFETs. Surface roughness scattering is not as prominent as observed in conventional MOSFETs. Also, because of its small size, the performance of the device is prone to the effect of variability, for which a discrete doping model was proved essential. Finally, a new JLFET was designed and optimized in this work. The proposed device is based on a gate-all-around silicon nanowire. Source/drain length is 32.5 nm and channel length is 14 nm. Gate contact length is 9 nm. The EOT (equivalent oxide thickness) is 1 nm. It has a metal gate with a workfunction of 4.55 eV. The source, channel and drain regions are n-type with a doping density of 1.5×1019 cm-3. Detailed simulation shows that the two most influential mechanisms that degrade the drive capability are quantum mechanical confinement and Coulomb scattering. Surface roughness scattering is found to be very weak. In addition, thinner nanowire is more prone to Coulomb scattering exhibiting a reduced ON-current (ION). Simulation results show that silicon nanowires with a side length (width and depth) of 3 nm and a doping density of 1.5×1019 cm-3 produce satisfactory drive current.