Date of Award


Degree Name

Master of Science


Electrical and Computer Engineering

First Advisor

Tragoudas, Spyros


The first part of the proposed method presents how to accelerate input test sequence generation to justify a given output sequence on observable points. A satisfiability module theory (SMT) solver generates the test pattern sequence using the time-frame expansion method. The contribution of the proposed approach is to accelerate test pattern generation by invoking a general-purpose multi-threading software tool, called the Executor Service which interacts with the SMT solver. The input to executor service is the design under test (DUT). The multi-threading tool schedules process on resources efficiently to get maximum throughput to reduce execution time. The user also determines the number of time-frames which determines the length of the test sequence.




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