Date of Award
Master of Science
Electrical and Computer Engineering
The number of transistors per chip still steadily increases for each technology node generation. Fabrication processes and computing architectures have enabled the integration of some hundreds of cores in the same chip leading to the design of many-core systems. Due to increased power and consequent thermal issues; power budget is a crucial constraint of computational resources. Consequently, only a subset of the available resources can be used at full throttle at any time, while the rest of remain idle. Coping with increasing power densities at run-time is a growing challenge in many-core systems. In this thesis, we present a distributed run-time and power constraints mapping for many-core systems (DROP). The goal is to balance the power consumption in the platform. The model adopted is an agent-based power system for distributing power and managing Dynamic Frequency and Voltage (DVFS). In order to validate the model, we implemented our approach on a distributed shared memory system using Cadence IUS5.8 simulator and Data Management Engine (DME) as a fully programmable and configurable hardware. The results show that the proposed methodology achieves a gain on an average of 26% in terms of total energy compared to an agent-based power economy model.
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