Date of Award
Doctor of Philosophy
Electrical and Computer Engineering
As the amount of data generated increases, so does the amount of data processing. However for some applications, a decision can be made using partial results obtained mid-computation. This research presents three MSB-first computation circuits which allow for early computation termination: an accumulator, a comparator and an arithmetic processing element. The circuits are constructed based on a novel carry propagation shift-register design. Results for various size inputs show a decrease in the number of clock cycles necessary to make a decision compared to existing techniques. In addition, the number of bits used in the computation is reduced, thereby decreasing the number of bits fetched from memory.
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