Date of Award

5-1-2016

Degree Name

Doctor of Philosophy

Department

Electrical and Computer Engineering

First Advisor

Wang, Haibo

Abstract

Analog-to-Digital conversion (ADC) is an essential process in signal processing. It converts analog signals in the real world to digital codes that can be conveniently processed by digital systems. Among various ADC architectures, pipelined ADC is very attractive since it can achieve high conversion speed and high resolution. In this dissertation, a reconfigurable pipelined ADC is presented. Its stage order programmability enables the capability to minimize process-variation induced performance degradation. In addition, a redundant stage is added to perform online testing and to replace a faulty stage, to enhance defect tolerance or improve yield. Simulations demonstrate that with the reconfiguration technique, a pipelined ADC is more robust, tolerating performance degradation and defects. With technology scaling, digital calibrations are becoming popular techniques to maintain pipelined ADC performance with relaxed analog circuit design requirement. Normally, calibration is only performed once based on the circuit performance during the test. However, aging induced reliability phenomena are more severe with shrinking transistor sizes and reducing power supplies. This causes transistor parameters shifts and consequently results in circuit performance degradation. The aging induced pipeline ADC performance degradation is investigated. Simulations show that calibration coefficients remain accurate after circuit performance degradation due to aging. Typically an ADC is designed for the worst case scenario of its expected operation conditions. However, this approach may not always achieve the best efficiency in different operation conditions. In sensor network applications, congestion leads to packet loss and subsequently causes data quality degradation. To reduce the network congestion level, the amount of data being transmitted from a sensor node needs to be reduced, which can be achieved by downsampling and data bit truncation. Adaptive operation according to environment information may help improve the overall system performance. Techniques to intelligently perform such operation and the potential benefits of such operation are also studied in this dissertation.

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