Date of Award

12-1-2014

Degree Name

Master of Science

Department

Electrical and Computer Engineering

First Advisor

TRAGOUDAS, SPYROS

Abstract

Network on Chip (NoC) architectures is an emerging paradigm for designing VLSI systems implemented on a single silicon chip. Recent activities focus on improvements in power consumption and in performance. This thesis focuses on real time aspects. It is shown that deadlines are met through preemptive scheduling. In particular, experimental studies show an average of 11% improvement in performance over existing non-preemptive methods. Keywords: High-level synthesis, scheduling, contention awareness, preemption, NoC.

Share

COinS
 

Access

This thesis is only available for download to the SIUC community. Others should
contact the interlibrary loan department of your local library.