A 5.8 GHz DSRC Digitally Controlled CMOS RF-SoC Transceiver for China ETC

Authors

Huimin Liu, Southern Illinois University CarbondaleFollow
Xiongfei Qu, Tianjin University of TechnologyFollow
Lingling Cao, Tianjin University of TechnologyFollow
Ruifeng Liu, RF microelectronics CorpFollow
Yuanzhi zhang, Southern Illinois University CarbondaleFollow
Meijuan Zhang, Tianjin University of TechnologyFollow
Xiaoqiang Li, Tianjin University of TechnologyFollow
Wenshen Wang, RF microelectronics CorpFollow
Chao Lu, Southern Illinois University CarbondaleFollow

Abstract

This paper presents a 5.8 GHz dedicated short range communication (DSRC) CMOS RF-SoC transceiver with digitally controlled RF architecture for China electronic toll collection (ETC) system. The operation of key RF blocks, such as ASK modulator, power amplifier, LNA, and mixer, are directly controlled by digital baseband. Compared with state-of-the-art designs in literature, this work demonstrates remarkable advantages in design simplicity, Tx output peak power, adjacent channel power ratio (ACPR), dynamic range, occupied bandwidth (OBW), bit error rate (BER), and so on.